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Researcher(M/F) – Development of Plasma Etching Processes for III-V Lasers for Silicon Photonic Integration

EURAXESS hosting organisation · عدة بلدان أوروبية

This work is carried out within the framework of the IRT Nanoelec project, which aims to bring a 300 mm CMOS-compatible integrated photonics platform to technological maturity. In this context, one of the key technological challenges is the plasma patterning of the complex III-V semiconductor stack forming the laser and transferred onto a 300 mm substrate by molecular bonding. A simplified example of the laser structure is: InP (4 µm) / GaAlInAs quantum wells (400 nm) / InP contact layer (200 nm) / Si substrate The objective of the project is to develop a plasma etching process for this multilayer stack, enabling selective etch stopping on the InP contact layer, which is currently the main technological challenge, while achieving anisotropic laser sidewalls without lateral degradation of t

At a glance

Where: Multiple European countries
Deadline: 2026-09-30
Funding: Funding described on programme page
Board: EURAXESS

Who can apply

Criteria stated by the funder on the official source.

Nationality

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Education

Research Field Engineering Education Level PhD or equivalent Research Field Physics Education Level PhD or equivalent Research Field Technology Education Level PhD or equivalent Languages FRENCH Level Basic Research Field Engineering Years of Research Experience 1 - 4 Research Field Physics Years of Re

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Funding and what it does not cover

Funding details were taken from the official programme page text. Confirm the current call before applying.